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Reconfigurable logic and space chips?

Reconfigurable logic and space chips?  
Paul A. Clayton
 Re: Reconfigurable logic and space chips?  
Martin Thompson
 Re: Reconfigurable logic and space chips?  
Del Cecchi
 Re: Reconfigurable logic and space chips?  
Paul A. Clayton
 Re: Reconfigurable logic and space chips?  
del cecchi
 Re: Reconfigurable logic and space chips?  
David Wang
From:Paul A. Clayton
Subject:Reconfigurable logic and space chips?
Date:12 Jan 2005 12:56:20 GMT
Does reconfigurable logic (e.g., something like Rahul Razdan's
PRISC) make more sense in chips to be used in space (and other
deeply embedded systems with a software upgrade link) than in
less deeply embedded systems? (I am using depth to refer to
difficulty in performing hardware upgrades. This question came
from a comment by someone at JPL [I think] that the software can
be improved while a spacecraft is in flight. Reconfigurable logic
might also allow workarounds for persistent hardware errors
[caused by, e.g., radiation].)

Paul A. Clayton
(a 'Dysthymicdolt' reachable at aol.com)
From:Martin Thompson
Subject:Re: Reconfigurable logic and space chips?
Date:13 Jan 2005 12:54:27 +0000
carchreader@aol.comnomail (Paul A. Clayton) writes:

> Does reconfigurable logic (e.g., something like Rahul Razdan's
> PRISC) make more sense in chips to be used in space (and other
> deeply embedded systems with a software upgrade link) than in
> less deeply embedded systems? (I am using depth to refer to
> difficulty in performing hardware upgrades. This question came
> from a comment by someone at JPL [I think] that the software can
> be improved while a spacecraft is in flight. Reconfigurable logic
> might also allow workarounds for persistent hardware errors
> [caused by, e.g., radiation].)
>

Xilinx have FPGAs in the Mars rover
(http://www.xilinx.com/publications/xcellonline/xcell_50/xc_mars50.htm),
and here's a paper (http://www.andraka.com/files/seu_mapld_2003.pdf)
describing how to overcome radiation effect.

Cheers,
Martin

--
martin.j.thompson@trw.com
TRW Conekt, Solihull, UK
http://www.trw.com/conekt
From:Del Cecchi
Subject:Re: Reconfigurable logic and space chips?
Date:Wed, 12 Jan 2005 11:13:07 -0600
Paul A. Clayton wrote:
> Does reconfigurable logic (e.g., something like Rahul Razdan's
> PRISC) make more sense in chips to be used in space (and other
> deeply embedded systems with a software upgrade link) than in
> less deeply embedded systems? (I am using depth to refer to
> difficulty in performing hardware upgrades. This question came
> from a comment by someone at JPL [I think] that the software can
> be improved while a spacecraft is in flight. Reconfigurable logic
> might also allow workarounds for persistent hardware errors
> [caused by, e.g., radiation].)
>
> Paul A. Clayton
> (a 'Dysthymicdolt' reachable at aol.com)
>

Here is a nasa website for your reading pleasure

http://klabs.org/index.htm
"Nasa office of logic Design--A scientific study of the problems of
digital engineering for space flight systems........"

All kinds of interesting data, including stuff on FPGA

del cecchi
From:Paul A. Clayton
Subject:Re: Reconfigurable logic and space chips?
Date:14 Jan 2005 15:05:19 GMT
In article <34l456F4aq5vmU1@individual.net>,
Del Cecchi wrote:

>Here is a nasa website for your reading pleasure
>
>http://klabs.org/index.htm

Sigh. Another lifetime of reading.

Thanks (I think :-).
From:del cecchi
Subject:Re: Reconfigurable logic and space chips?
Date:Fri, 14 Jan 2005 19:33:33 -0600

"Paul A. Clayton" wrote in message
news:20050114100519.19590.00000027@mb-m06.aol.com...
> In article <34l456F4aq5vmU1@individual.net>,
> Del Cecchi wrote:
>
> >Here is a nasa website for your reading pleasure
> >
> >http://klabs.org/index.htm
>
> Sigh. Another lifetime of reading.
>
> Thanks (I think :-).

If you can't do the time, don't do the crime. :-)
From:David Wang
Subject:Re: Reconfigurable logic and space chips?
Date:Wed, 12 Jan 2005 17:06:46 +0000 (UTC)
Paul A. Clayton wrote:
> Does reconfigurable logic (e.g., something like Rahul Razdan's
> PRISC) make more sense in chips to be used in space (and other
> deeply embedded systems with a software upgrade link) than in
> less deeply embedded systems? (I am using depth to refer to
> difficulty in performing hardware upgrades. This question came
> from a comment by someone at JPL [I think] that the software can
> be improved while a spacecraft is in flight. Reconfigurable logic
> might also allow workarounds for persistent hardware errors
> [caused by, e.g., radiation].)

I think of reconfigurable logic as either a bunch of fixed logic
computation elements with programmable routig paths, or fixed
routing paths with programmable logic elements. (Or some combination
thereof) The configuration state has to be held by some
sort of re-programmable storage element, and that storage element is
going to be susceptable to radiation. I think reconfigurable logic
can be re-jigged to remove errors quite easily, but how does one
detect errors in the first place? Complete redundancy? Program
an odd number of reconfigurable statemachines and let them vote?
I don't see an advantage for reconfigurable logic here.

--
davewang202(at)yahoo(dot)com
   

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